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Evelyn Johns: My summer placement at CERN

08 Oct 2026

My name’s Evelyn and I’m a third-year Apprentice Software Engineer working in the Detector Systems Software Group. This summer, as part of the apprenticeship scheme, I had the opportunity to undertake an 11-week placement at CERN, in the Converter Controls Electronics team. Whilst there, I worked on a project for one of the largest power converters at CERN that delivers precise voltages to the accelerators.

In order to test the converter controls, the team is creating a demo system that will behave and “speak” as the real converter does, so the controls can’t tell the difference. This will support development throughout Long Shutdown 3 and all the upgrades necessary for the High-Luminosity Large Hadron Collider. I worked on just one part of this system: a circuit board fitted with a Field-Programmable Gate Array (FPGA). An FPGA is a chip that can be reprogrammed using code after manufacturing, so it can be customised to perform specific functions extremely quickly. Its job in this system is to act as an interpreter. On one side, a Speedgoat real-time simulator produces the raw signals a real converter would generate. On the other side are the controls, which expect those signals in a very specific format. The board sits in the middle and translates between the two.

Coming into the project as a software engineer, even with some Hardware Description Language experience, it was still a total mindset change to the concurrent nature of HDL, and a learning curve to overcome. The design used a Zynq UltraScale+ MPSoC, a chip that combines a processor with programmable logic, which I had no prior experience with. Getting the two halves to talk to each other while the system is running requires an operating system with a custom device tree, a file that tells the operating system what hardware exists and how to reach it. This added another layer and a new element to the project.

FPGA design schematic showing interconnected hardware blocks, communication modules and signal paths used in a digital electronics project.

Aurora loopback test.

In VHDL and block design, I implemented Aurora – a high-speed serial communication protocol used by the FPGA to receive its input data. I tested this using an SFP+ loopback and Vivado logic analyser IPs, with a clock derived from the Processing System.

Waveform simulation displaying timing and data signals used to verify the operation of a digital electronics or FPGA design.

DAC signals analysed in Vivado.

Then for the outputs, I worked with both digital and analogue signals, and with Digital-to-Analogue Converters (DACs) to ensure the data had the expected format. This required careful configuration for the specific hardware, with enough dead time between frames, and the correct latch timing to synchronise the channels. This was one of the trickiest parts: the smallest timing error could scramble the output, and tracking these down needed real attention to detail.

Finally, I learnt how to use a VHDL-specific version control tool called HDL on Git (Hog), and VUnit – a testbench tool- so that my work is traceable and reproducible in the future. Each of these was a distinct skill in its own right, but what I found most interesting was seeing how they all had to work together so precisely for the board to function as a whole. Being able to produce a tangible output on physical hardware was very satisfying.

Away from the office, I had the opportunity to visit lots of the CERN facilities, including ALICE, the old DELPHI detector, the Control Centre, and the Antimatter Factory! It’s amazing to put your work into the context of all the science that it enables, and learn from the tour guides who give up their time to show off these experiments. I also enjoyed life in Geneva: it being summer there were lots of events to go to, including Fête de la Musique, Swiss Fête Nationale, and even CERN’s own music festival, the Hardronic! Over a couple of weekends, I took some time to visit other parts of Switzerland and France. I got to see Mont Blanc up close and take on Switzerland’s longest toboggan run!

A woman stands on a mountain viewing platform overlooking snow-covered peaks and glaciers under a clear blue sky.

Mont Blanc from Aiguille du Midi (3842m)

Four people wearing CERN safety helmets and staff lanyards stand in an industrial indoor area.

With other STFC placement students at CERN

The emphasis on collaboration at CERN is very strong; everyone is a tiny cog working on the largest and most complex machine in the world, and this was a fascinating environment to observe and learn within. I also had the privilege of working in an international and multidisciplinary group, with a wide range of expertise and backgrounds. This was something that enriched my experience so much, especially as an apprentice at the very start of my career.

Written by Evelyn Johns.