Our ASIC design activity focuses on the design of mixed-signal integrated circuits (ICs) for the readout of sensitive detectors. We also specialise in the design of analogue preamplifiers, matched to the detector and optimised for noise performance and power.
Utilising the leading IC design software tools, we can offer a complete on-chip solution to detector readout with high-performance Analogue-to-Digital Converters (ADCs), high-speed data serialisers, and slow-control interfaces such as SPI and I2C, all within the same IC. We design with mainstream microelectronic technologies chosen in accordance with technical requirements and available budget.
Our bespoke service ensures that we work closely with customers through every stage of the project. from specification, through design and manufacture, to test and integration, to guarantee that our designs meet their needs and that the detector system achieves optimal performance from the IC.
Our ICs are present in advanced instruments for space science, medical imaging, synchrotrons, nuclear physics, and particle physics experiments, with channel densities ranging from tens to millions of channels in size -such as in the Silicon Tracker layers of the
Compact Muon Solenoid experiment on the Large Hadron Collider at CERN. Our experience in application areas such as these also means that we are experts at designing ICs to operate in harsh environments, such as extreme temperatures or radiation.
Our ongoing development programme ensures that we are always advancing our capabilities in anticipation of the requirements for the next generation of detector systems. All of our design projects are realised in compliance with our ISO9001-certified Quality Management System.
We perform the testing of ASICs is performed in a dedicated test facility. Our facility is equipped to support all aspects of evaluating and characterising the new and innovative ASICs designed to realise the science of STFC's facilities and collaborations. This includes the capability to test ASICs at extremely low temperatures and a wafer scale of up to 300mm.
For enquiries regarding ASIC Design, please contact Mark Prydderch.